Network Working Group M. Riegel
Request for Comments: 4197 Siemens AG
Category: Informational October 2005
Network Working Group M. Riegel
Request for Comments: 4197 Siemens AG
Category: Informational October 2005
Requirements for Edge-to-Edge Emulation of Time Division Multiplexed (TDM) Circuits over Packet Switching Networks
分组交换网络上时分复用（TDM）电路的边到边仿真要求
Status of This Memo
关于下段备忘
This memo provides information for the Internet community. It does not specify an Internet standard of any kind. Distribution of this memo is unlimited.
本备忘录为互联网社区提供信息。它没有规定任何类型的互联网标准。本备忘录的分发不受限制。
Copyright Notice
版权公告
Copyright (C) The Internet Society (2005).
版权所有（C）互联网协会（2005年）。
Abstract
摘要
This document defines the specific requirements for edge-to-edge emulation of circuits carrying Time Division Multiplexed (TDM) digital signals of the Plesiochronous Digital Hierarchy as well as the Synchronous Optical NETwork/Synchronous Digital Hierarchy over packet-switched networks. It is aligned to the common architecture for Pseudo Wire Emulation Edge-to-Edge (PWE3). It makes references to the generic requirements for PWE3 where applicable and complements them by defining requirements originating from specifics of TDM circuits.
本文件定义了准同步数字体系以及分组交换网络上的同步光网络/同步数字体系的时分复用（TDM）数字信号传输电路的边到边仿真的具体要求。它与伪线仿真边到边（PWE3）的通用体系结构保持一致。它参考了适用的PWE3通用要求，并通过定义源自TDM电路细节的要求对其进行了补充。
Table of Contents
目录
1. Introduction ....................................................3
1.1. TDM Circuits Belonging to the PDH Hierarchy ................3
1.1.1. TDM Structure and Transport Modes ...................4
1.2. SONET/SDH Circuits .........................................4
2. Motivation ......................................................5
3. Terminology .....................................................6
4. Reference Models ................................................7
4.1. Generic PWE3 Models ........................................7
4.2. Clock Recovery .............................................7
4.3. Network Synchronization Reference Model ....................8
4.3.1. Synchronous Network Scenarios ......................10
4.3.2. Relative Network Scenario ..........................12
4.3.3. Adaptive Network Scenario ..........................12
5. Emulated Services ..............................................13
5.1. Structure-Agnostic Transport of Signals out of the
PDH Hierarchy .............................................13
5.2. Structure-Aware Transport of Signals out of the
PDH Hierarchy .............................................14
5.3. Structure-Aware Transport of SONET/SDH Circuits ...........14
6. Generic Requirements ...........................................14
6.1. Relevant Common PW Requirements ...........................14
6.2. Common Circuit Payload Requirements .......................15
6.3. General Design Issues .....................................16
7. Service-Specific Requirements ..................................16
7.1. Connectivity ..............................................16
7.2. Network Synchronization ...................................16
7.3. Robustness ................................................16
7.3.1. Packet loss ........................................17
7.3.2. Out-of-order delivery ..............................17
7.4. CE Signaling ..............................................17
7.5. PSN Bandwidth Utilization .................................18
7.6. Packet Delay Variation ....................................19
7.7. Compatibility with the Existing PSN Infrastructure ........19
7.8. Congestion Control ........................................19
7.9. Fault Detection and Handling ..............................20
7.10. Performance Monitoring ...................................20
8. Security Considerations ........................................20
9. References .....................................................20
9.1. Normative References ......................................20
9.2. Informative References ....................................21
10. Contributors Section ..........................................22
1. Introduction ....................................................3
1.1. TDM Circuits Belonging to the PDH Hierarchy ................3
1.1.1. TDM Structure and Transport Modes ...................4
1.2. SONET/SDH Circuits .........................................4
2. Motivation ......................................................5
3. Terminology .....................................................6
4. Reference Models ................................................7
4.1. Generic PWE3 Models ........................................7
4.2. Clock Recovery .............................................7
4.3. Network Synchronization Reference Model ....................8
4.3.1. Synchronous Network Scenarios ......................10
4.3.2. Relative Network Scenario ..........................12
4.3.3. Adaptive Network Scenario ..........................12
5. Emulated Services ..............................................13
5.1. Structure-Agnostic Transport of Signals out of the
PDH Hierarchy .............................................13
5.2. Structure-Aware Transport of Signals out of the
PDH Hierarchy .............................................14
5.3. Structure-Aware Transport of SONET/SDH Circuits ...........14
6. Generic Requirements ...........................................14
6.1. Relevant Common PW Requirements ...........................14
6.2. Common Circuit Payload Requirements .......................15
6.3. General Design Issues .....................................16
7. Service-Specific Requirements ..................................16
7.1. Connectivity ..............................................16
7.2. Network Synchronization ...................................16
7.3. Robustness ................................................16
7.3.1. Packet loss ........................................17
7.3.2. Out-of-order delivery ..............................17
7.4. CE Signaling ..............................................17
7.5. PSN Bandwidth Utilization .................................18
7.6. Packet Delay Variation ....................................19
7.7. Compatibility with the Existing PSN Infrastructure ........19
7.8. Congestion Control ........................................19
7.9. Fault Detection and Handling ..............................20
7.10. Performance Monitoring ...................................20
8. Security Considerations ........................................20
9. References .....................................................20
9.1. Normative References ......................................20
9.2. Informative References ....................................21
10. Contributors Section ..........................................22
This document defines the specific requirements for edge-to-edge emulation of circuits carrying Time Division Multiplexed (TDM) digital signals of the Plesiochronous Digital Hierarchy (PDH) as well as the Synchronous Optical NETwork (SONET)/Synchronous Digital Hierarchy (SDH) over Packet-Switched Networks (PSN). It is aligned to the common architecture for Pseudo Wire Emulation Edge-to-Edge (PWE3) as defined in [RFC3985]. It makes references to requirements in [RFC3916] where applicable and complements [RFC3916] by defining requirements originating from specifics of TDM circuits.
本文件定义了准同步数字体系（PDH）以及分组交换网络（PSN）上的同步光网络（SONET）/同步数字体系（SDH）的时分复用（TDM）数字信号传输电路的边到边仿真的具体要求。它与[RFC3985]中定义的伪线仿真边到边（PWE3）的通用体系结构一致。它在适用的情况下参考了[RFC3916]中的要求，并通过定义源自TDM电路细节的要求来补充[RFC3916]。
The term "TDM" will be used in this documents as a general descriptor for the synchronous bit streams belonging to either the PDH or the SONET/SDH hierarchies.
术语“TDM”将在本文件中用作属于PDH或SONET/SDH层次结构的同步比特流的一般描述符。
The bit rates traditionally used in various regions of the world are detailed in the normative reference [G.702]. For example, in North America, the T1 bit stream of 1.544 Mbps and the T3 bit stream of 44.736 Mbps are mandated, while in Europe, the E1 bit stream of 2.048 Mbps and the E3 bit stream of 34.368 Mbps are utilized.
规范性参考文件[G.702]详细说明了世界各地区传统使用的比特率。例如，在北美，强制使用1.544 Mbps的T1比特流和44.736 Mbps的T3比特流，而在欧洲，使用2.048 Mbps的E1比特流和34.368 Mbps的E3比特流。
Although TDM can be used to carry unstructured bit streams at the rates defined in [G.702], there is a standardized method of carrying bit streams in larger units called frames, each frame contains the same number of bits.
尽管TDM可用于以[G.702]中定义的速率承载非结构化比特流，但有一种以称为帧的较大单位承载比特流的标准化方法，每个帧包含相同数量的比特。
Related to the sampling frequency of voice traffic the bitrate is always a multiple of 8000, hence the T1 frame consists of 193 bits and the E1 frame of 256 bits. The number of bits in a frame is called the frame size.
与语音业务的采样频率相关，比特率始终是8000的倍数，因此T1帧由193位组成，E1帧由256位组成。帧中的位数称为帧大小。
The framing is imposed by introducing a periodic pattern into the bit stream to identify the boundaries of the frames (e.g., 1 framing bit per T1 frame, a sequence of 8 framing bits per E1 frame). The details of how these framing bits are generated and used are elucidated in [G.704], [G.706], and [G.751]. Unframed TDM has all bits available for payload.
通过在比特流中引入周期模式来施加帧，以识别帧的边界（例如，每T1帧1帧比特，每E1帧8帧比特的序列）。[G.704]、[G.706]和[G.751]中阐述了如何生成和使用这些帧位的细节。无帧TDM具有有效负载的所有可用位。
Framed TDM is often used to multiplex multiple channels (e.g., voice channels each consisting of 8000 8-bit-samples per second) in a sequence of "timeslots" recurring in the same position in each frame. This multiplexing is called "channelized TDM" and introduces additional structure.
帧TDM通常用于以“时隙”序列复用多个信道（例如，语音信道，每个信道每秒包含8000个8位采样），这些“时隙”在每个帧中的相同位置重复出现。这种多路复用被称为“信道化TDM”，并引入了额外的结构。
In some cases, framing also defines groups of consecutive frames called multiframes. Such grouping imposes an additional level of structure on the TDM bit-stream.
在某些情况下，帧还定义称为多帧的连续帧组。这种分组对TDM比特流施加了额外的结构级别。
Unstructured TDM: TDM that consists of a raw bit-stream of rate defined in [G.702], with all bits available for payload.
非结构化TDM：由[G.702]中定义的速率的原始比特流组成的TDM，所有比特可用于有效负载。
Structured TDM: TDM with one or more levels of structure delineation, including frames, channelization, and multiframes (e.g., as defined in [G.704], [G.751], and [T1.107]).
结构化TDM：具有一个或多个层次结构描述的TDM，包括帧、信道化和多帧（例如，如[g.704]、[g.751]和[T1.107]中的定义）。
Structure-Agnostic Transport: Transport of unstructured TDM, or of structured TDM when the structure is deemed inconsequential from the transport point of view. In structure-agnostic transport, any structural overhead that may be present is transparently transported along with the payload data, and the encapsulation provides no mechanisms for its location or utilization.
结构不可知传输：非结构化TDM的传输，或从传输角度认为结构不重要时结构化TDM的传输。在结构不可知传输中，可能存在的任何结构开销都会与有效载荷数据一起透明传输，并且封装不会为其定位或利用提供任何机制。
Structure-Aware Transport: Transport of structured TDM taking at least some level of the structure into account. In structure-aware transport, there is no guarantee that all bits of the TDM bit-stream will be transported over the PSN network (specifically, the synchronization bits and related overhead may be stripped at ingress and usually will be regenerated at egress) or that transported bits will be situated in the packet in their original order (but in this case, bit order is usually recovered at egress; one known exception is loss of multiframe synchronization between the TDM data and CAS bits introduced by a digital cross-connect acting as a Native Service Processing (NSP) block, see [TR-NWT-170]).
结构感知传输：结构化TDM的传输，至少考虑结构的某个级别。在结构感知传输中，不能保证TDM比特流的所有比特将通过PSN网络传输（具体地说，同步比特和相关开销可以在入口剥离，并且通常将在出口重新生成），或者传输的比特将以其原始顺序位于分组中（但在这种情况下，位顺序通常在出口处恢复；一个已知的例外是TDM数据和CAS位之间的多帧同步丢失，由充当本机服务处理（NSP）块的数字交叉连接引入，参见[TR-NWT-170]）。
The term SONET refers to the North American Synchronous Optical NETwork as specified by [T1.105]. It is based on the concept of a Nx783 byte payload container repeated every 125us. This payload is referred to as an STS-1 SPE and may be concatenated into higher bandwidth circuits (e.g., STS-Nc) or sub-divided into lower bandwidth circuits (Virtual Tributaries). The higher bandwidth concatenated circuits can be used to carry anything from IP Packets to ATM cells to Digital Video Signals. Individual STS-1 SPEs are frequently used
术语SONET指[T1.105]规定的北美同步光网络。它基于Nx783字节有效负载容器的概念，每125us重复一次。该有效负载被称为STS-1 SPE，可以连接到更高带宽的电路（例如，STS Nc）中，或者细分为更低带宽的电路（虚拟支路）。更高带宽的级联电路可以用来携带从IP包到ATM信元再到数字视频信号的任何东西。经常使用单个STS-1 SPE
to carry individual DS3 or E3 TDM circuits. When the 783 byte containers are sub-divided for lower rate payloads, they are frequently used to carry individual T1 or E1 TDM circuits.
携带单独的DS3或E3 TDM电路。当783字节容器被细分为低速率有效负载时，它们通常用于承载单个T1或E1 TDM电路。
The Synchronous Digital Hierarchy (SDH) is the international equivalent and enhancement of SONET and is specified by [G.707].
同步数字体系（SDH）是SONET的国际等效和增强，由[G.707]规定。
Both SONET and SDH include a substantial amount of transport overhead that is used for performance monitoring, fault isolation, and other maintenance functions along different types of optical or electrical spans. This also includes a pointer-based mechanism for carrying payloads asynchronously. In addition, the payload area includes dedicated overhead for end-to-end performance monitoring, fault isolation, and maintenance for the service being carried. If the main payload area is sub-divided into lower rate circuits (such as T1/E1), additional overhead is included for end-to-end monitoring of the individual T1/E1 circuits.
SONET和SDH都包含大量的传输开销，用于性能监测、故障隔离和沿不同类型的光或电跨度的其他维护功能。这还包括用于异步承载有效负载的基于指针的机制。此外，有效负载区域还包括用于端到端性能监控、故障隔离和所承载服务维护的专用开销。如果主有效负载区域被细分为较低速率电路（如T1/E1），则额外的开销将被包括在各个T1/E1电路的端到端监控中。
This document discusses the requirements for emulation of SONET/SDH services. These services include end-to-end emulation of the SONET payload (STS-1 SPE), emulation of concatenated payloads (STS-Nc SPE), as well as emulation of a variety of sub-STS-1 rate circuits jointly referred to as Virtual Tributaries (VT) and their SDH analogs.
本文件讨论了SONET/SDH服务仿真的要求。这些服务包括SONET有效负载（STS-1 SPE）的端到端仿真、级联有效负载（STS Nc SPE）仿真，以及联合称为虚拟支路（VT）的各种子STS-1速率电路及其SDH模拟电路的仿真。
[RFC3916] specifies common requirements for edge-to-edge emulation of circuits of various types. However, these requirements, as well as references in [RFC3985], do not cover specifics of PWs carrying TDM circuits.
[RFC3916]规定了各种类型电路的边到边仿真的通用要求。然而，这些要求以及[RFC3985]中的参考文献并未涵盖承载TDM电路的PWs的细节。
The need for a specific document to complement [RFC3916] addressing of edge-to-edge emulation of TDM circuits arises from the following:
需要一份特定文件来补充TDM电路边到边仿真的[RFC3916]寻址，原因如下：
o Specifics of the TDM circuits. For example,
o TDM电路的详细信息。例如
* the need for balance between the clock of ingress and egress attachment circuits in each direction of the Pseudo Wire (PW),
* 需要在伪线（PW）每个方向的入口时钟和出口连接电路之间保持平衡，
* the need to maintain jitter and wander of the clock of the egress end service, within the limits imposed by the appropriate normative documents, in the presence of the packet delay variation produced by the PSN.
* 在存在由PSN产生的分组延迟变化的情况下，需要在适当的规范性文件施加的限制内保持出口端服务的时钟的抖动和漂移。
o Specifics of applications using TDM circuits. For example, voice applications,
o 使用TDM电路的应用细节。例如，语音应用程序，
* put special emphasis on minimization of one-way delay, and
* 特别强调将单向延迟最小化，以及
* are relatively tolerant to errors in data.
* 对数据中的错误具有相对容忍度。
o Other applications might have different specifics. For example, transport of signaling information
o 其他应用程序可能有不同的细节。例如，信令信息的传输
* is relatively tolerant to one-way delay, and
* 相对容忍单向延迟，以及
* is sensitive to errors in transmitted data.
* 对传输数据中的错误非常敏感。
o Specifics of the customers' expectations regarding end-to-end behavior of services that contain emulated TDM circuits. For example, experience with carrying such services over SONET/SDH networks increases the need for
o 客户对包含模拟TDM电路的服务的端到端行为的期望的详细信息。例如，通过SONET/SDH网络承载此类服务的经验增加了对
* isolation of problems introduced by the PSN from those occurring beyond the PSN bounds,
* 将PSN引入的问题与超出PSN界限的问题隔离开来，
* sensitivity to misconnection,
* 对错误连接的敏感性，
* sensitivity to unexpected connection termination, etc.
* 对意外连接终止等的敏感性。
The key words "MUST", "MUST NOT", "REQUIRED", "SHALL", "SHALL NOT", "SHOULD", "SHOULD NOT", "RECOMMENDED", "MAY", and "OPTIONAL" in this document are to be interpreted as described in [RFC2119].
本文件中的关键词“必须”、“不得”、“必需”、“应”、“不应”、“应”、“不应”、“建议”、“可”和“可选”应按照[RFC2119]中所述进行解释。
The terms defined in [RFC3985], Section 1.4 are used consistently. However some terms and acronyms are used in conjunction with the TDM services. In particular:
一致使用[RFC3985]第1.4节中定义的术语。然而，一些术语和首字母缩略词与TDM服务一起使用。特别地：
TDM networks employ Channel-Associated Signaling (CAS) or Common Channel Signaling (CCS) to supervise and advertise status of telephony applications, provide alerts to these applications (as to requests to connect or disconnect), and to transfer routing and addressing information. These signals must be reliably transported over the PSNs for the telephony end-systems to function properly.
TDM网络采用信道相关信令（CAS）或公共信道信令（CCS）来监控和公布电话应用程序的状态，向这些应用程序提供警报（关于连接或断开连接的请求），并传输路由和寻址信息。这些信号必须通过PSN可靠传输，以便电话端系统正常工作。
CAS (Channel-Associated Signaling) CAS is carried in the same T1 or E1 frame as the voice signals, but not in the speech band. Since CAS signaling may be transferred at a rate slower than the TDM traffic in a timeslot, one need not update all the CAS bits in every TDM frame. Hence, CAS systems cycle through all the signaling bits only after some number of TDM frames, which defines a new structure known as a multiframe or superframe. Common multiframes are 12, 16, or 24 frames in length, corresponding to 1.5, 2, and 3 milliseconds in duration.
CAS（信道相关信令）CAS在与语音信号相同的T1或E1帧中承载，但不在语音频带中承载。由于CAS信令可以在时隙中以低于TDM业务的速率传输，因此不需要更新每个TDM帧中的所有CAS比特。因此，CAS系统仅在一定数量的TDM帧之后循环通过所有信令比特，这定义了称为多帧或超帧的新结构。常见的多帧长度为12、16或24帧，对应于1.5、2和3毫秒的持续时间。
CCS (Common Channel Signaling) CCS signaling uses a separate digital channel to carry asynchronous messages pertaining to the state of telephony applications over related TDM timeslots of a TDM trunk. This channel may be physically situated in one or more adjacent timeslots of the same TDM trunk (trunk associated CCS) or may be transported over an entirely separate network.
CCS（公共信道信令）CCS信令使用单独的数字信道在TDM中继的相关TDM时隙上传送与电话应用程序状态有关的异步消息。该信道可以物理上位于同一TDM中继（中继相关的CCS）的一个或多个相邻时隙中，或者可以通过完全独立的网络进行传输。
CCS is typically HDLC-based, with idle codes or keep-alive messages being sent until a signaling event (e.g., on-hook or off-hook) occurs. Examples of HDLC-based CCS systems are SS7 [Q.700] and ISDN PRI signaling [Q.931].
CCS通常基于HDLC，发送空闲代码或保持活动消息，直到发生信令事件（如挂机或摘机）。基于HDLC的CCS系统的示例包括SS7[Q.700]和ISDN PRI信令[Q.931]。
Note: For the TDM network, we use the terms "jitter" and "wander" as defined in [G.810] to describe short- and long-term variance of the significant instants of the digital signal, while for the PSN we use the term packet delay variation (PDV) (see [RFC3393]).
注：对于TDM网络，我们使用[G.810]中定义的术语“抖动”和“漂移”来描述数字信号有效瞬间的短期和长期变化，而对于PSN，我们使用术语包延迟变化（PDV）（参见[RFC3393]）。
Generic models that have been defined in [RFC3985] in sections
[RFC3985]中第节定义的通用模型
- 4.1 (Network Reference Model), - 4.2 (PWE3 Pre-processing), - 4.3 (Maintenance Reference Model), - 4.4 (Protocol Stack Reference Model) and - 4.5 (Pre-processing Extension to Protocol Stack Reference Model).
- 4.1（网络参考模型）、-4.2（PWE3预处理）、-4.3（维护参考模型）、-4.4（协议栈参考模型）和-4.5（协议栈参考模型的预处理扩展）。
They are fully applicable for the purposes of this document without modification.
它们完全适用于本文件，无需修改。
All the services considered in this document represent special cases of the Bit-stream and Structured bit-stream payload type defined in Section 3.3 of [RFC3985].
本文件中考虑的所有服务代表[RFC3985]第3.3节中定义的比特流和结构化比特流有效负载类型的特殊情况。
Clock recovery is extraction of the transmission bit timing information from the delivered packet stream. Extraction of this information from a highly jittered source, such as a packet stream, may be a complex task.
时钟恢复是从传送的分组流中提取传输比特定时信息。从高度抖动的源（如数据包流）提取该信息可能是一项复杂的任务。
Figure 1 shows a generic network synchronization reference model.
图1显示了一个通用的网络同步参考模型。
+---------------+ +---------------+
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| | | |P| |E| |P| | | | | | | |P| |D| |P| | | |
| |===>|h|=>|n|:>|h|:::>| |::>| |:::>|h|:>|e|=>|h|===>| |
| | | |y| |c| |y| | | | | | | |y| |c| |y| | | |
+---+ | +-+ +-+ +-+ | +--+ +--+ | +-+ +-+ +-+ | +---+
^ ^ | | ^ | | | ^ | ^ ^
| | | |B | |<------+------>| | | | | |
| A | +--+ | | | +--+-E | F |
| +---------------+ +-+ +---------------+ |
| ^ |I| ^ |
| | +-+ | |
| C D |
+-----------------------------L-----------------------------+
+---------------+ +---------------+
| PE1 | | PE2 |
K | +--+ | | +--+ | G
| | | J| | | | H| | |
v | v | | | v | | v
+---+ | +-+ +-+ +-+ | +--+ +--+ | +-+ +-+ +-+ | +---+
| | | |P| |D| |P| | | | | | | |P| |E| |P| | | |
| |<===|h|<:|e|<:|h|<:::| |<::| |<:::|h|<:|n|<=|h|<===| |
| | | |y| |c| |y| | | | | | | |y| |c| |y| | | |
| C | | +-+ +-+ +-+ | | | | | | +-+ +-+ +-+ | | C |
| E | | | |S1| |S2| | | | E |
| 1 | | +-+ +-+ +-+ | | | | | | +-+ +-+ +-+ | | 2 |
| | | |P| |E| |P| | | | | | | |P| |D| |P| | | |
| |===>|h|=>|n|:>|h|:::>| |::>| |:::>|h|:>|e|=>|h|===>| |
| | | |y| |c| |y| | | | | | | |y| |c| |y| | | |
+---+ | +-+ +-+ +-+ | +--+ +--+ | +-+ +-+ +-+ | +---+
^ ^ | | ^ | | | ^ | ^ ^
| | | |B | |<------+------>| | | | | |
| A | +--+ | | | +--+-E | F |
| +---------------+ +-+ +---------------+ |
| ^ |I| ^ |
| | +-+ | |
| C D |
+-----------------------------L-----------------------------+
Figure 1: The Network Synchronization Reference Model
图1：网络同步参考模型
The following notation is used in Figure 1:
图1中使用了以下符号：
CE1, CE2 Customer edge devices terminating TDM circuits to be emulated.
CE1、CE2终端TDM电路的客户边缘设备将被模拟。
PE1, PE2 Provider edge devices adapting these end services to PW.
PE1、PE2供应商边缘设备，使这些终端服务适应PW。
S1, S2 Provider core routers.
S1，S2提供程序核心路由器。
Phy Physical interface terminating the TDM circuit.
终止TDM电路的物理接口。
Enc PSN-bound interface of the PW, where the encapsulation takes place.
封装发生的PW的Enc PSN绑定接口。
Dec CE-bound interface of the PW, where the decapsulation takes place. It contains a compensation buffer (also known as the "jitter buffer") of limited size.
PW的Dec-CE结合界面，在此处进行脱封。它包含一个大小有限的补偿缓冲区（也称为“抖动缓冲区”）。
"==>" TDM attachment circuits.
“==>”TDM连接电路。
"::>" PW providing edge-to-edge emulation for the TDM circuit.
“：：>”PW为TDM电路提供边到边仿真。
The characters "A" - "L" denote various clocks:
字符“A”-“L”表示各种时钟：
"A" The clock used by CE1 for transmission of the TDM attachment circuit towards CE1.
“A”CE1用于向CE1传输TDM连接电路的时钟。
"B" The clock recovered by PE1 from the incoming TDM attachment circuit. "A" and "B" always have the same frequency.
“B”PE1从输入TDM连接电路恢复的时钟。“A”和“B”的频率总是相同的。
"G" The clock used by CE2 for transmission of the TDM attachment circuit towards CE2.
“G”CE2用于向CE2传输TDM连接电路的时钟。
"H" The clock recovered by PE2 from the incoming TDM attachment circuit. "G" and "H" always have the same frequency.
“H”PE2从输入TDM连接电路恢复的时钟。“G”和“H”总是有相同的频率。
"C", "D" Local oscillators available to PE1 and PE2, respectively.
分别适用于PE1和PE2的“C”、“D”本地振荡器。
"E" Clock used by PE2 to transmit the TDM attachment service circuit to CE2 (the recovered clock).
PE2使用“E”时钟将TDM附件服务电路传输至CE2（恢复的时钟）。
"F" Clock recovered by CE2 from the incoming TDM attachment service ("E and "F" have the same frequency).
CE2从传入TDM连接服务恢复的“F”时钟（“E和“F”具有相同的频率）。
"I" If the clock exists, it is the common network reference clock available to PE1 and PE2.
“I”如果时钟存在，则为PE1和PE2可用的公共网络参考时钟。
"J" Clock used by PE1 to transmit the TDM attachment service circuit to CE1 (the recovered clock).
PE1使用“J”时钟将TDM附件服务电路传输至CE1（恢复时钟）。
"K" Clock recovered by CE1 from the incoming TDM attachment service ("J" and "K" have the same frequency).
CE1从传入TDM连接服务恢复的“K”时钟（“J”和“K”具有相同的频率）。
"L" If it exists, it is the common reference clock of CE1 and CE2. Note that different pairs of CE devices may use different common reference clocks.
“L”如果存在，则为CE1和CE2的公共参考时钟。注意，不同的CE设备对可以使用不同的公共参考时钟。
A requirement of edge-to-edge emulation of a TDM circuit is that clock "B" and "E", as well as clock "H" and "J", are of the same frequency. The most appropriate method will depend on the network synchronization scheme.
TDM电路的边到边仿真要求时钟“B”和“E”以及时钟“H”和“J”具有相同的频率。最合适的方法取决于网络同步方案。
The following groups of synchronization scenarios can be considered:
可以考虑以下几组同步方案：
Depending on which part of the network is synchronized by a common clock, there are two scenarios:
根据网络的哪个部分由公共时钟同步，有两种情况：
o PE Synchronized Network:
o PE同步网络：
Figure 2 is an adapted version of the generic network reference model, and presents the PE synchronized network scenario.
图2是通用网络参考模型的修改版本，显示了PE同步网络场景。
The common network reference clock "I" is available to all the PE devices, and local oscillators "C" and "D" are locked to "I":
公共网络参考时钟“I”可用于所有PE设备，本地振荡器“C”和“D”锁定到“I”：
* Clocks "E" and "J" are the same as "D" and "C", respectively.
* 时钟“E”和“J”分别与“D”和“C”相同。
* Clocks "A" and "G" are the same as "K" and "F", respectively (i.e., CE1 and CE2 use loop timing).
* 时钟“A”和“G”分别与“K”和“F”相同（即，CE1和CE2使用循环定时）。
+-----+ +-----+
+-----+ | |- - -|=================|- - -| | +-----+
| /-- |<---------|............PW1..............|<---------| <-\ |
|| CE | | | PE1 | | PE2 | | |CE2 ||
| \-> |--------->|............PW2..............|--------->| --/ |
+-----+ | |- - -|=================|- - -| | +-----+
+-----+ +-----+
^ ^
|C |D
+-----------+-----------+
|
+-+
|I|
+-+
+-----+ +-----+
+-----+ | |- - -|=================|- - -| | +-----+
| /-- |<---------|............PW1..............|<---------| <-\ |
|| CE | | | PE1 | | PE2 | | |CE2 ||
| \-> |--------->|............PW2..............|--------->| --/ |
+-----+ | |- - -|=================|- - -| | +-----+
+-----+ +-----+
^ ^
|C |D
+-----------+-----------+
|
+-+
|I|
+-+
Figure 2: PE Synchronized Scenario
图2:PE同步场景
o CE Synchronized Network:
o CE同步网络：
Figure 3 is an adapted version of the generic network reference model, and presents the CE synchronized network scenario.
图3是通用网络参考模型的修改版本，显示了CE同步网络场景。
The common network reference clock "L" is available to all the CE devices, and local oscillators "A" and "G" are locked to "L":
公共网络参考时钟“L”可用于所有CE设备，且本地振荡器“A”和“G”锁定到“L”：
* Clocks "E" and "J" are the same as "G" and "A", respectively (i.e., PE1 and PE2 use loop timing).
* 时钟“E”和“J”分别与“G”和“A”相同（即，PE1和PE2使用环路定时）。
+-----+ +-----+
+-----+ | |- - -|=================|- - -| | +-----+
| |<---------|............PW1..............|<---------| |
| CE1 | | | PE1 | | PE2 | | | CE2 |
| |--------->|............PW2..............|--------->| |
+-----+ | |- - -|=================|- - -| | +-----+
^ +-----+ +-----+ ^
|A G|
+----------------------------+------------------------------+
|
+-+
|L|
+-+
+-----+ +-----+
+-----+ | |- - -|=================|- - -| | +-----+
| |<---------|............PW1..............|<---------| |
| CE1 | | | PE1 | | PE2 | | | CE2 |
| |--------->|............PW2..............|--------->| |
+-----+ | |- - -|=================|- - -| | +-----+
^ +-----+ +-----+ ^
|A G|
+----------------------------+------------------------------+
|
+-+
|L|
+-+
Figure 3: CE Synchronized Scenario
图3:CE同步场景
No timing information has to be transferred in these cases.
在这些情况下，不需要传输时间信息。
In this case, each CE uses its own transmission clock source that must be carried across the PSN and recovered by the remote PE, respectively. The common PE clock "I" can be used as reference for this purpose.
在这种情况下，每个CE使用其自己的传输时钟源，该传输时钟源必须分别通过PSN传输并由远程PE恢复。普通PE时钟“I”可作为此用途的参考。
Figure 4 shows the relative network scenario.
图4显示了相关的网络场景。
The common network reference clock "I" is available to all the PE devices, and local oscillators "C" and "D" are locked to "I":
公共网络参考时钟“I”可用于所有PE设备，本地振荡器“C”和“D”锁定到“I”：
o Clocks "A" and "G" are generated locally without reference to a common clock.
o 时钟“A”和“G”在本地生成，不参考公共时钟。
o Clocks "E" and "J" are generated in reference to a common clock available at all PE devices.
o 时钟“E”和“J”参考所有PE设备上可用的公共时钟生成。
In a slight modification of this scenario, one (but not both!) of the CE devices may use its receive clock as its transmission clock (i.e., use loop timing).
在该场景的轻微修改中，一个（但不是两个！）CE设备可以使用其接收时钟作为其传输时钟（即，使用循环定时）。
|G
+-----+ +-----+ v
+-----+ | |- - -|=================|- - -| | +-----+
| |<---------|............PW1..............|<---------| |
| CE1 | | | PE1 | | PE2 | | | CE2 |
| |--------->|............PW2..............|--------->| |
+-----+ | |- - -|=================|- - -| | +-----+
^ +-----+<-------+------->+-----+
|A |
+-+
|I|
+-+
|G
+-----+ +-----+ v
+-----+ | |- - -|=================|- - -| | +-----+
| |<---------|............PW1..............|<---------| |
| CE1 | | | PE1 | | PE2 | | | CE2 |
| |--------->|............PW2..............|--------->| |
+-----+ | |- - -|=================|- - -| | +-----+
^ +-----+<-------+------->+-----+
|A |
+-+
|I|
+-+
Figure 4: Relative Network Scenario Timing
图4：相对网络场景定时
In this case, timing information (the difference between the common reference clock "I" and the incoming clock "A") MUST be explicitly transferred from the ingress PE to the egress PE.
在这种情况下，定时信息（公共参考时钟“I”和传入时钟“A”之间的差）必须明确地从入口PE传输到出口PE。
The adaptive scenario is characterized by:
自适应场景的特点是：
o No common network reference clock "I" is available to PE1 and PE2.
o 没有公共网络参考时钟“I”可用于PE1和PE2。
o No common reference clock "L" is available to CE1 and CE2.
o CE1和CE2没有公共参考时钟“L”。
Figure 5 presents the adaptive network scenario.
图5显示了自适应网络场景。
|J |G
v |
+-----+ +-----+ v
+-----+ | |- - -|=================|- - -| | +-----+
| |<---------|............PW1..............|<---------| |
| CE1 | | | PE1 | | PE2 | | | CE2 |
| |--------->|............PW2..............|--------->| |
+-----+ | |- - -|=================|- - -| | +-----+
^ +-----+ +-----+
| ^
A| E|
|J |G
v |
+-----+ +-----+ v
+-----+ | |- - -|=================|- - -| | +-----+
| |<---------|............PW1..............|<---------| |
| CE1 | | | PE1 | | PE2 | | | CE2 |
| |--------->|............PW2..............|--------->| |
+-----+ | |- - -|=================|- - -| | +-----+
^ +-----+ +-----+
| ^
A| E|
Figure 5: Adaptive Scenario
图5：自适应场景
Synchronizing clocks "A" and "E" in this scenario is more difficult than it is in the other scenarios.
在这种情况下，同步时钟“A”和“E”比在其他情况下更困难。
Note that the tolerance between clocks "A" and "E" must be small enough to ensure that the jitter buffer does not overflow or underflow.
请注意，时钟“A”和“E”之间的公差必须足够小，以确保抖动缓冲区不会溢出或下溢。
In this case, timing information MAY be explicitly transferred from the ingress PE to the egress PE, e.g., by RTP.
在这种情况下，可以例如通过RTP将定时信息从入口PE显式地传输到出口PE。
This section defines requirements for the payload and encapsulation layers for edge-to-edge emulation of TDM services with bit-stream payload as well as structured bit-stream payload.
本节定义了使用比特流有效载荷以及结构化比特流有效载荷对TDM服务进行边到边仿真的有效载荷和封装层的要求。
Wherever possible, the requirements specified in this document SHOULD be satisfied by appropriate arrangements of the encapsulation layer only. The (rare) cases when the requirements apply to both the encapsulation and payload layers (or even to the payload layer only) will be explicitly noted.
在可能的情况下，仅通过封装层的适当布置来满足本文件中规定的要求。当要求同时适用于封装层和有效负载层（甚至仅适用于有效负载层）时，将明确指出（罕见的）情况。
The service-specific encapsulation layer for edge-to-edge emulation comprises the following services over a PSN.
用于边缘到边缘仿真的特定于服务的封装层包括PSN上的以下服务。
Structure-agnostic transport is considered for the following signals:
对于以下信号，考虑结构不可知传输：
o E1 as described in [G.704].
o E1如[G.704]所述。
o T1 (DS1) as described in [G.704].
o T1（DS1）如[G.704]所述。
o E3 as defined in [G.751].
o [G.751]中定义的E3。
o T3 (DS3) as described in [T1.107].
o T3（DS3），如[T1.107]所述。
Structure-aware transport is considered for the following signals:
以下信号考虑结构感知传输：
o E1/T1 with one of the structures imposed by framing as described in [G.704].
o E1/T1，具有[G.704]中所述框架施加的结构之一。
o NxDS0 with or without CAS.
o 带或不带CAS的NxDS0。
Structure-aware transport is considered for the following SONET/SDH circuits:
以下SONET/SDH电路考虑结构感知传输：
o SONET STS-1 synchronous payload envelope (SPE)/SDH VC-3.
o SONET STS-1同步有效载荷包络（SPE）/SDH VC-3。
o SONET STS-Nc SPE (N = 3, 12, 48, 192) / SDH VC-4, VC-4-4c, VC-4-16c, VC-4-64c.
o SONET STS Nc SPE（N=3,12,48,192）/SDH VC-4、VC-4-4c、VC-4-16c、VC-4-64c。
o SONET VT-N (N = 1.5, 2, 3, 6) / SDH VC-11, VC-12, VC-2.
o SONET VT-N（N=1.5,2,3,6）/SDH VC-11、VC-12、VC-2。
o SONET Nx VT-N / SDH Nx VC-11/VC-12/VC-2/VC-3.
o SONET Nx VT-N/SDH Nx VC-11/VC-12/VC-2/VC-3。
Note: There is no requirement for the structure-agnostic transport of SONET/SDH. For this case, it would seem that structure must be taken into account.
注：SONET/SDH的结构不可知传输没有要求。在这种情况下，似乎必须考虑结构。
The encapsulation and payload layers MUST conform to the common PW requirements defined in [RFC3916]:
封装层和有效载荷层必须符合[RFC3916]中定义的通用PW要求：
1. Conveyance of Necessary Header Information:
1. 传送必要的标题信息：
A. For structure-agnostic transport, this functionality MAY be provided by the payload layer.
A.对于结构不可知传输，该功能可由有效载荷层提供。
B. For structure-aware transport, the necessary information MUST be provided by the encapsulation layer.
B.对于结构感知传输，封装层必须提供必要的信息。
C. Structure-aware transport of SONET/SDH circuits MUST preserve path overhead information as part of the payload. Relevant components of the transport overhead MAY be carried in the encapsulation layer.
C.SONET/SDH电路的结构感知传输必须将路径开销信息保留为有效负载的一部分。传输开销的相关组件可以在封装层中承载。
2. Support of Multiplexing and Demultiplexing if supported by the native services. This is relevant for Nx DS0 circuits (with or without signaling) and Nx VT-x in a single STS-1 SPE or VC-4.:
2. 如果本机服务支持，则支持多路复用和解多路复用。这与单个STS-1 SPE或VC-4中的Nx DS0电路（带或不带信号）和Nx VT-x有关：
A. For these circuits, the combination of encapsulation and payload layers MUST provide for separate treatment of every sub-circuit.
A.对于这些电路，封装层和有效负载层的组合必须为每个子电路提供单独的处理。
B. Enough information SHOULD be provided by the pseudo wire to allow multiplexing and demultiplexing by the NSP. Reduction of the complexity of the PW emulation by using NSP circuitry for multiplexing and demultiplexing MAY be the preferred solution.
B.伪线应提供足够的信息，以允许NSP进行多路复用和解多路复用。通过使用用于复用和解复用的NSP电路来降低PW仿真的复杂性可能是优选的解决方案。
3. Intervention or transparent transfer of Maintenance Messages of the Native Services, depending on the particular scenario.
3. 本机服务维护消息的干预或透明传输，取决于特定场景。
4. Consideration of Per-PSN Packet Overhead (see also Section 7.5 below).
4. 考虑每个PSN数据包的开销（另见下文第7.5节）。
5. Detection and handling of PW faults. The list of faults is given in Section 7.9 below.
5. PW故障的检测和处理。故障列表见下文第7.9节。
Fragmentation indications MAY be used for structure-aware transport when the structures in question either exceed desired packetization delay or exceed Path MTU between the pair of PEs.
当所述结构超过期望的分组延迟或超过一对PE之间的路径MTU时，碎片指示可用于结构感知传输。
The following requirement listed in [RFC3916] is not applicable to emulation of TDM services:
[RFC3916]中列出的以下要求不适用于TDM服务的仿真：
o Support of variable length PDUs.
o 支持可变长度PDU。
Structure-agnostic transport treats TDM circuits as belonging to the 'Bit-stream' payload type defined in [RFC3985].
结构无关传输将TDM电路视为属于[RFC3985]中定义的“比特流”有效负载类型。
Structure-aware transport treats these circuits as belonging to the "Structured bit-stream" payload type defined in [RFC3985].
结构感知传输将这些电路视为属于[RFC3985]中定义的“结构化比特流”有效负载类型。
Accordingly, the encapsulation layer MUST provide the common Sequencing service and SHOULD provide Timing information (Synchronization services) when required (see Section 4.3 above).
因此，封装层必须提供公共排序服务，并在需要时提供定时信息（同步服务）（见上文第4.3节）。
Note: Length service MAY be provided by the encapsulation layer, but is not required.
注：长度服务可以由封装层提供，但不是必需的。
The combination of payload and encapsulation layers SHOULD comply with the general design principles of the Internet protocols as presented in Section 3 of [RFC1958] and [RFC3985].
有效载荷和封装层的组合应符合[RFC1958]和[RFC3985]第3节中所述互联网协议的一般设计原则。
If necessary, the payload layer MAY use some forms of adaptation of the native TDM payload in order to achieve specific, well-documented design objectives. In these cases, standard adaptation techniques SHOULD be used.
如有必要，有效载荷层可使用本机TDM有效载荷的某些形式的适配，以实现特定的、有据可查的设计目标。在这些情况下，应使用标准适应技术。
1. The emulation MUST support the transport of signals between Attachment Circuits (ACs) of the same type (see Section 5) and, wherever appropriate, bit-rate.
1. 仿真必须支持相同类型（见第5节）的连接电路（AC）之间的信号传输，并在适当情况下支持比特率。
2. The encapsulation layer SHOULD remain unaffected by specific characteristics of connection between the ACs and PE devices at the two ends of the PW.
2. 封装层应不受PW两端ACs和PE设备之间连接的特定特性的影响。
1. The encapsulation layer MUST provide synchronization services that are sufficient to:
1. 封装层必须提供足以满足以下要求的同步服务：
A. match the ingress and egress end service clocks regardless of the specific network synchronization scenario, and
A.匹配入口和出口端服务时钟，无论具体的网络同步场景如何，以及
B. keep the jitter and wander of the egress service clock within the service-specific limits defined by the appropriate normative references.
B.将出口服务时钟的抖动和漂移保持在适当规范性参考文件规定的特定服务限制范围内。
2. If the same high-quality synchronization source is available to all the PE devices in the given domain, the encapsulation layer SHOULD be able to make use of it (e.g., for better reconstruction of the native service clock).
2. 如果相同的高质量同步源可用于给定域中的所有PE设备，则封装层应该能够利用它（例如，为了更好地重建本机服务时钟）。
The robustness of the emulated service depends not only upon the edge-to-edge emulation protocol, but also upon proper implementation of the following procedures.
仿真服务的健壮性不仅取决于边到边仿真协议，还取决于以下过程的正确实现。
Edge-to-edge emulation of TDM circuits MAY assume very low probability of packet loss between ingress and egress PE. In particular, no retransmission mechanisms are required.
TDM电路的边到边仿真可以假设入口和出口PE之间的分组丢失概率非常低。特别是，不需要重传机制。
In order to minimize the effect of lost packets on the egress service, the encapsulation layer SHOULD:
为了最小化丢失的数据包对出口服务的影响，封装层应：
1. Enable independent interpretation of TDM data in each packet by the egress PE (see [RFC2736]). This requirement MAY be disregarded if the egress PE needs to interpret structures that exceed the path MTU between the ingress and egress PEs.
1. 通过出口PE对每个数据包中的TDM数据进行独立解释（参见[RFC2736]）。如果出口PE需要解释超出入口和出口PE之间路径MTU的结构，则可以忽略该要求。
2. Allow reliable detection of lost packets (see next section). In particular, it SHOULD allow estimation of the arrival time of the next packet and detection of lost packets based on this estimate.
2. 允许可靠地检测丢失的数据包（见下一节）。特别地，它应该允许估计下一个分组的到达时间，并基于该估计检测丢失的分组。
3. Minimize possible effect of lost packets on recovery of the circuit clock by the egress PE.
3. 最小化丢失的分组对出口PE恢复电路时钟的可能影响。
4. Increase the resilience of the CE TDM interface to packet loss by allowing the egress PE to substitute appropriate data.
4. 通过允许出口PE替换适当的数据，提高CE TDM接口对分组丢失的恢复能力。
The encapsulation layer MUST provide the necessary mechanisms to guarantee ordered delivery of packets carrying the TDM data over the PSN. Packets that have arrived out-of-order:
封装层必须提供必要的机制，以保证通过PSN有序地传送携带TDM数据的数据包。到达时出现故障的数据包：
1. MUST be detected, and
1. 必须检测到，并且
2. SHOULD be reordered if not judged to be too late or too early for playout.
2. 如果没有被判定为太晚或太早，则应重新排序。
Out-of-order packets that cannot be reordered MUST be treated as lost.
无法重新排序的无序数据包必须视为丢失。
Unstructured TDM circuits would not usually require any special mechanism for carrying CE signaling as this would be carried as part of the emulated service.
非结构化TDM电路通常不需要任何特殊机制来承载CE信令，因为这将作为模拟服务的一部分进行。
Some CE applications using structured TDM circuits (e.g., telephony) require specific signaling that conveys the changes of state of these applications relative to the TDM data.
一些使用结构化TDM电路（例如，电话）的CE应用需要特定的信令，该信令传递这些应用相对于TDM数据的状态变化。
The encapsulation layer SHOULD support signaling of state of CE applications for the relevant circuits providing for:
封装层应支持相关电路CE应用状态的信令，提供：
1. Ability to support different signaling schemes with minimal impact on encapsulation of TDM data,
1. 能够在对TDM数据封装影响最小的情况下支持不同的信令方案，
2. Multiplexing of application-specific CE signals and data of the emulated service in the same PW,
2. 在同一PW中复用特定于应用的CE信号和模拟服务的数据，
3. Synchronization (within the application-specific tolerance limits) between CE signals and data at the PW egress,
3. PW出口处CE信号和数据之间的同步（在应用特定公差范围内），
4. Probabilistic recovery against possible, occasional loss of packets in the PSN, and
4. 针对PSN中可能偶尔丢失的数据包进行概率恢复，以及
5. Deterministic recovery of the CE application state after PW setup and network outages.
5. PW设置和网络中断后CE应用程序状态的确定性恢复。
CE signaling that is used for maintenance purposes (loopback commands, performance monitoring data retrieval, etc.) SHOULD use the generic PWE3 maintenance protocol.
用于维护目的（环回命令、性能监测数据检索等）的CE信令应使用通用PWE3维护协议。
1. The encapsulation layer SHOULD allow for an effective trade-off between the following requirements:
1. 封装层应考虑以下要求之间的有效权衡：
A. Effective PSN bandwidth utilization. Assuming that the size of the encapsulation layer header does not depend on the size of its payload, an increase in the packet payload size results in increased efficiency.
A.有效的PSN带宽利用率。假设封装层报头的大小不依赖于其有效负载的大小，则分组有效负载大小的增加导致效率的提高。
B. Low edge-to-edge latency. Low end-to-end latency is the common requirement for Voice applications over TDM services. Packetization latency is one of the components comprising edge-to-edge latency, and it decreases with the packet payload size.
B.较低的边缘到边缘延迟。低端到端延迟是通过TDM服务的语音应用程序的常见要求。分组延迟是组成边缘到边缘延迟的组件之一，它随着分组有效负载的大小而减小。
The compensation buffer used by the CE-bound IWF increases latency to the emulated circuit. Additional delays introduced by this buffer SHOULD NOT exceed the packet delay variation observed in the PSN.
受CE约束的IWF使用的补偿缓冲区增加了模拟电路的延迟。该缓冲区引入的额外延迟不应超过PSN中观察到的数据包延迟变化。
2. The encapsulation layer MAY provide for saving PSN bandwidth by not sending corrupted TDM data across the PSN.
2. 封装层可以通过不跨PSN发送损坏的TDM数据来提供节省PSN带宽。
3. The encapsulation layer MAY provide the ability to save the PSN bandwidth for the structure-aware case by not sending channels that are permanently inactive.
3. 封装层可以通过不发送永久不活动的信道来为结构感知情况提供节省PSN带宽的能力。
4. The encapsulation layer MAY enable the dynamic suppression of temporarily unused channels from transmission for the structure-aware case.
4. 对于结构感知情况，封装层可以使暂时未使用的信道的传输受到动态抑制。
If used, dynamic suppression of temporarily unused channels MUST NOT violate the integrity of the structures delivered over the PW.
如果使用，临时未使用通道的动态抑制不得破坏PW上交付的结构的完整性。
5. For NxDS0, the encapsulation layer MUST provide the ability to keep the edge-to-edge delay independent of the service rate.
5. 对于NxDS0，封装层必须提供使边缘到边缘延迟独立于服务速率的能力。
The encapsulation layer SHOULD provide for the ability to compensate for packet delay variation, while maintaining jitter and wander of the egress end service clock with tolerances specified in the normative references.
封装层应提供补偿分组延迟变化的能力，同时保持出口端服务时钟的抖动和漂移，公差在规范性参考文件中规定。
The encapsulation layer MAY provide for run-time adaptation of delay introduced by the jitter buffer if the packet delay variation varies with time. Such an adaptation MAY introduce a low level of errors (within the limits tolerated by the application) but SHOULD NOT introduce additional wander of the egress end service clock.
如果分组延迟变化随时间变化，则封装层可提供由抖动缓冲器引入的延迟的运行时自适应。这种自适应可能会引入低水平的错误（在应用允许的范围内），但不应引入出口端服务时钟的额外漂移。
The combination of encapsulation and PSN tunnel layers used for edge-to-edge emulation of TDM circuits SHOULD be compatible with existing PSN infrastructures. In particular, compatibility with the mechanisms of header compression over links where capacity is at a premium SHOULD be provided.
用于TDM电路边到边仿真的封装层和PSN隧道层的组合应与现有PSN基础设施兼容。特别是，应提供与容量较高的链路上的报头压缩机制的兼容性。
TDM circuits run at a constant rate, and hence offer constant traffic loads to the PSN. The rate varying mechanism that TCP uses to match the demand to the network congestion state is, therefore, not applicable.
TDM电路以恒定速率运行，因此为PSN提供恒定的业务负载。因此，TCP用于将需求与网络拥塞状态相匹配的速率变化机制不适用。
The ability to shut down a TDM PW when congestion has been detected MUST be provided.
必须提供在检测到拥塞时关闭TDM PW的能力。
Precautions should be taken to avoid situations wherein multiple TDM PWs are simultaneously shut down or re-established, because this leads to PSN instability.
应采取预防措施，避免同时关闭或重新建立多个TDM PW的情况，因为这会导致PSN不稳定。
Further congestion considerations are discussed in chapter 6.5 of [RFC3985].
[RFC3985]的第6.5章讨论了进一步的拥塞注意事项。
The encapsulation layer for edge-to-edge emulation of TDM services SHOULD, separately or in conjunction with the lower layers of the PWE3 stack, provide for detection, handling, and reporting of the following defects:
TDM服务的边到边仿真封装层应单独或与PWE3堆栈的较低层结合，提供以下缺陷的检测、处理和报告：
1. Misconnection, or Stray Packets. The importance of this requirement stems from customer expectation due to reliable misconnection detection in SONET/SDH networks.
1. 连接错误或数据包丢失。由于SONET/SDH网络中存在可靠的误连接检测，因此该要求的重要性源于客户的期望。
2. Packet Loss. Packet loss detection is required to maintain clock integrity, as discussed in Section 7.3.1 above. In addition, packet loss detection mechanisms SHOULD provide for localization of the outage in the end-to-end emulated service.
2. 数据包丢失。如上文第7.3.1节所述，需要进行丢包检测以保持时钟完整性。此外，丢包检测机制应提供端到端模拟服务中中断的本地化。
3. Malformed packets.
3. 格式错误的数据包。
The encapsulation layer for edge-to-edge emulation of TDM services SHOULD provide for collection of performance monitoring (PM) data that is compatible with the parameters defined for 'classic', TDM-based carriers of these services. The applicability of [G.826] is left for further study.
TDM服务的边到边仿真封装层应提供性能监控（PM）数据的收集，该数据与为这些服务的“经典”基于TDM的运营商定义的参数兼容。[G.826]的适用性有待进一步研究。
The security considerations in [RFC3916] are fully applicable to the emulation of TDM services. In addition, TDM services are sensitive to packet delay variation [Section 7.6], and need to be protected from this method of attack.
[RFC3916]中的安全注意事项完全适用于TDM服务的仿真。此外，TDM服务对数据包延迟变化敏感[第7.6节]，需要保护其免受这种攻击方法的影响。
[RFC2119] Bradner, S., "Key words for use in RFCs to Indicate Requirement Levels", BCP 14, RFC 2119, March 1997.
[RFC2119]Bradner，S.，“RFC中用于表示需求水平的关键词”，BCP 14，RFC 2119，1997年3月。
[RFC3916] Xiao, X., McPherson, D., and P. Pate, "Requirements for Pseudo-Wire Emulation Edge-to-Edge (PWE3)", RFC 3916, September 2004.
[RFC3916]Xiao，X.，McPherson，D.，和P.Pate，“伪线仿真边到边（PWE3）的要求”，RFC 39162004年9月。
[RFC3985] Bryant, S. and P. Pate, "Pseudo Wire Emulation Edge-to-Edge (PWE3) Architecture", RFC 3985, March 2005.
[RFC3985]Bryant，S.和P.Pate，“伪线仿真边到边（PWE3）架构”，RFC 39852005年3月。
[G.702] ITU-T Recommendation G.702 (11/88) - Digital hierarchy bit rates
[G.702]ITU-T建议G.702（11/88）-数字体系比特率
[G.704] ITU-T Recommendation G.704 (10/98) - Synchronous frame structures used at 1544, 6312, 2048, 8448 and 44 736 Kbit/s hierarchical levels
[G.704]ITU-T建议G.704（10/98）-在154463120488448和44736kbit/s分层级别上使用的同步帧结构
[G.706] ITU-T Recommendation G.706 (04/91) - Frame alignment and cyclic redundancy check (CRC) procedures relating to basic frame structures defined in Recommendation G.704
[G.706]ITU-T建议G.706（04/91）-与建议G.704中定义的基本帧结构相关的帧对齐和循环冗余校验（CRC）程序
[G.707] ITU-T Recommendation G.707 (10/00) - Network node interface for the synchronous digital hierarchy (SDH)
[G.707]ITU-T建议G.707（10/00）-同步数字体系（SDH）的网络节点接口
[G.751] ITU-T Recommendation G.751 (11/88) - Digital multiplex equipments operating at the third order bit rate of 34 368 Kbit/s and the fourth order bit rate of 139 264 Kbit/s and using positive justification
[G.751]ITU-T建议G.751（11/88）-以34368kbit/s的三阶比特率和139264kbit/s的四阶比特率运行并使用正对齐的数字多路复用设备
[G.810] ITU-T Recommendation G.810 (08/96) - Definitions and terminology for synchronization networks
[G.810]ITU-T建议G.810（08/96）——同步网络的定义和术语
[G.826] ITU-T Recommendation G.826 (02/99) - Error performance parameters and objectives for international, constant bit rate digital paths at or above the primary rate
[G.826]ITU-T建议G.826（02/99）——基本速率或以上国际恒定比特率数字路径的错误性能参数和目标
[Q.700] ITU-T Recommendation Q.700 (03/93) - Introduction to CCITT Signalling System No. 7
[Q.700]ITU-T建议Q.700（03/93）-CCITT第7号信令系统介绍
[Q.931] ITU-T Recommendation Q.931 (05/98) - ISDN user-network interface layer 3 specification for basic call control
[Q.931]ITU-T建议Q.931（05/98）——基本呼叫控制的ISDN用户网络接口第3层规范
[RFC1958] Carpenter, B., "Architectural Principles of the Internet", RFC 1958, June 1996.
[RFC1958]Carpenter，B.，“互联网的建筑原理”，RFC19581996年6月。
[RFC2736] Handley, M. and C. Perkins, "Guidelines for Writers of RTP Payload Format Specifications", BCP 36, RFC 2736, December 1999.
[RFC2736]Handley，M.和C.Perkins，“RTP有效载荷格式规范编写者指南”，BCP 36，RFC 2736，1999年12月。
[RFC3393] Demichelis, C. and P. Chimento, "IP Packet Delay Variation Metric for IP Performance Metrics (IPPM)", RFC 3393, November 2002.
[RFC3393]Demichelis，C.和P.Chimento，“IP性能度量的IP数据包延迟变化度量（IPPM）”，RFC 3393，2002年11月。
[T1.105] ANSI T1.105 - 2001 Synchronous Optical Network (SONET) - Basic Description including Multiplex Structure, Rates, and Formats, May 2001
[T1.105]ANSI T1.105-2001同步光网络（SONET）-基本说明，包括多路复用结构、速率和格式，2001年5月
[T1.107] ANSI T1.107 - 1995. Digital Hierarchy - Format Specification
[T1.107]ANSI T1.107-1995。数字体系.格式规范
[TR-NWT-170] Digital Cross Connect Systems - Generic Requirements and Objectives, Bellcore, TR-NWT-170, January 1993
[TR-NWT-170]数字交叉连接系统-一般要求和目标，Bellcore，TR-NWT-170，1993年1月
The following have contributed to this document:
以下是对本文件的贡献：
Sasha Vainshtein Axerra Networks
Sasha Vainstein Axerra网络公司
EMail: sasha@axerra.com
EMail: sasha@axerra.com
Yaakov Stein RAD Data Communication
Yaakov-Stein无线电数据通信
EMail: yaakov_s@rad.com
EMail: yaakov_s@rad.com
Prayson Pate Overture Networks, Inc.
Prayson Pate序曲网络公司。
EMail: prayson.pate@overturenetworks.com
EMail: prayson.pate@overturenetworks.com
Ron Cohen Lycium Networks
Ron Cohen枸杞网络
EMail: ronc@lyciumnetworks.com
EMail: ronc@lyciumnetworks.com
Tim Frost Zarlink Semiconductor
Tim Frost Zarlink半导体公司
EMail: tim.frost@zarlink.com
EMail: tim.frost@zarlink.com
Author's Address
作者地址
Maximilian Riegel Siemens AG St-Martin-Str 76 Munich 81541 Germany
德国慕尼黑圣马丁街76号Maximilian Riegel西门子公司81541
Phone: +49-89-636-75194
EMail: maximilian.riegel@siemens.com
Phone: +49-89-636-75194
EMail: maximilian.riegel@siemens.com
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